BREM=0, DTOM=0, ILRM=0, BWEM=0, ENDEM=0, RSPTOM=0, CMDEM=0, ILWM=0, CRCEM=0, ILAM=0
SD_INFO2 Interrupt Mask Register
| CMDEM | Command Error Interrupt Request Mask 0 (0): Command error interrupt request not masked 1 (1): Command error interrupt request masked |
| CRCEM | CRC Error Interrupt Request Mask 0 (0): CRC error interrupt request not masked 1 (1): CRC error interrupt request masked |
| ENDEM | End Bit Error Interrupt Request Mask 0 (0): End bit detection error interrupt request not masked 1 (1): End bit detection error interrupt request masked |
| DTOM | Data Timeout Interrupt Request Mask 0 (0): Data timeout interrupt request not masked 1 (1): Data timeout interrupt request masked |
| ILWM | SD_BUF Register Illegal Write Interrupt Request Mask 0 (0): Illegal write detection interrupt request for the SD_BUF register not masked 1 (1): Illegal write detection interrupt request for the SD_BUF register masked |
| ILRM | SD_BUF Register Illegal Read Interrupt Request Mask 0 (0): Illegal read detection interrupt request for the SD_BUF register not masked 1 (1): Illegal read detection interrupt request for the SD_BUF register masked |
| RSPTOM | Response Timeout Interrupt Request Mask 0 (0): Response timeout interrupt request not masked 1 (1): Response timeout interrupt request masked |
| Reserved | This bit is read as 0. The write value should be 0. |
| BREM | BRE Interrupt Request Mask 0 (0): Read enable interrupt request for the SD buffer not masked 1 (1): Read enable interrupt request for the SD buffer masked |
| BWEM | BWE Interrupt Request Mask 0 (0): Write enable interrupt request for the SD_BUF register not masked 1 (1): Write enable interrupt request for the SD_BUF register masked |
| Reserved | This bit is read as 0. The write value should be 0. |
| Reserved | This bit is read as 1. The write value should be 1. |
| Reserved | These bits are read as 000. The write value should be 000. |
| ILAM | Illegal Access Error Interrupt Request Mask 0 (0): Illegal access error interrupt request not masked 1 (1): Illegal access error interrupt request masked |
| Reserved | These bits are read as 0000000000000000. The write value should be 0000000000000000. |